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| STE53NC50 N-CHANNEL 500V - 0.070 - 53A ISOTOP PowerMeshTMII MOSFET TYPE STE53NC50 n n n n n VDSS 500V RDS(on) < 0.08 ID 53 A TYPICAL RDS(on) = 0.07 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED DESCRIPTION The PowerMESHTMII is the evolution of the first generation of MESH OVERLAYTM. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns swithing speed, gate charge and ruggedness. ISOTOP INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING n SWITH MODE POWER SUPPLIES (SMPS) n DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVER n ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM (l) PTOT dv/dt (1) VISO Tstg Tj May 2002 Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Insulation Winthstand Voltage (AC-RMS) Storage Temperature Max. Operating Junction Temperature Value 500 500 30 53 33 212 460 3.68 3 2500 - 65 to 150 150 (1) ISD 53A, di/dt100 A/s, VDD 24V, TjTjMAX Unit V V V A A A W W/C V/ns V C C 1/8 (*)Pulse width limited by safe operating area STE53NC50 THERMAL DATA Rthj-case Rthc-h Thermal Resistance Junction-case Max 0.272 0.05 C/W C/W Thermal Resistance Case-heatsink with Conductive Grease Applied AVALANCHE CHARACTERISTICS Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V) Max Value 53 1043 Unit A mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 30V Min. 500 10 100 100 Typ. Max. Unit V A A nA ON (1) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250A VGS = 10V, ID = 27A Min. 2 Typ. 3 0.07 Max. 4 0.08 Unit V DYNAMIC Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 15 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 42 11.2 1350 115 Max. Unit S nF pF pF Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2/8 STE53NC50 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 250V, ID = 26.5A RG = 4.7 VGS = 10V (see test circuit, Figure 3) VDD = 400V, ID = 53A, VGS = 10V Min. Typ. 46 70 310 46 150 434 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 400V, ID = 53A, RG = 4.7, VGS = 10V (see test circuit, Figure 5) Min. Typ. 45 38 85 Max. Unit ns ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 53A, VGS = 0 ISD = 53A, di/dt = 100A/s, VDD = 70V, Tj = 150C (see test circuit, Figure 5) 760 17.86 47 Test Conditions Min. Typ. Max. 53 212 1.6 Unit A A V ns C A Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedence 3/8 STE53NC50 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STE53NC50 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STE53NC50 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STE53NC50 ISOTOP MECHANICAL DATA DIM. MIN. A B C D E F G H J K L M N O 11.8 8.9 1.95 0.75 12.6 25.15 31.5 4 4.1 14.9 30.1 37.8 4 7.8 8.2 4.3 15.1 30.3 38.2 mm TYP. MAX. 12.2 9.1 2.05 0.85 12.8 25.5 31.7 MIN. 0.466 0.350 0.076 0.029 0.496 0.990 1.240 0.157 0.161 0.586 1.185 1.488 0.157 0.307 0.322 0.169 0.594 1.193 1.503 inch TYP. MAX. 0.480 0.358 0.080 0.033 0.503 1.003 1.248 G O B A N D E J K L M H C F 7/8 STE53NC50 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com 8/8 |
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